抽象的な

Gate Capacitance Extraction Two Dimensional T- Shaped Junction less Transistor Using Sentaurus TCAD

B Prashanth Kumar, G.Amarnath, G S Rao, Wasim Arif, and Srimanta Baishya

The junctionless transistor is one of the device structures which found tremendous potential in terms of reduction of short channel effects, scaling factors, capacitance & fabrication. In this paper we observed an improved gate capacitance (Cgg) in depletion and inversion regions of a T-shape double gate junctionless transistor with comparison to the single gate junctionless transistor for oxide thickness (tox), different doping concentration (ND) and Gate lengths (Lg).